文献类型：期刊文献

英文题名：Development of the data acquisition system for terahertz spectrometer

作者：Hu, Pengfei Shen, Li Han, Feng Yang, Fei Song, Maojiang Zhang, Li Liu, Liping

第一作者：Hu, Pengfei

通信作者：Liu, LP[1]

机构：[1]Guizhou Meterage Inst, Guiyang, Guizhou, Peoples R China;[2]Guizhou Inst Technol, Sch Pharmaceut Engn, Guiyang 550003, Guizhou, Peoples R China

第一机构：Guizhou Meterage Inst, Guiyang, Guizhou, Peoples R China

通信机构：corresponding author), Guizhou Inst Technol, Sch Pharmaceut Engn, Guiyang 550003, Guizhou, Peoples R China.|贵州理工学院食品药品制造工程学院;贵州理工学院;

年份：2018

卷号：40

期号：3

起止页码：805-811

外文期刊名：TRANSACTIONS OF THE INSTITUTE OF MEASUREMENT AND CONTROL

收录：;EI(收录号：20180704787199);Scopus(收录号：2-s2.0-85041551479);WOS:【SCI-EXPANDED(收录号:WOS:000424288200009)】；

基金：The author(s) disclosed receipt of the following financial support for the research, authorship, and/or publication of this article: The authors would like to acknowledge the financial support provided by Guizhou Science and Technology Department. This work was supported by Guizhou Science and Technology Department (NO. SY20143065, NO. J20142107) and General Administration of Quality Supervision, Inspection and Quarantine of the People's Republic of China (NO. 2014QK063). This work is supported by National Natural Science Foundation of China (No. 21503045, No. 61540038).

语种：英文

外文关键词：THz-TDS; data acquisition; FPGA; lock-in amplifier

摘要：In most Terahertz time-domain spectrometer (THz-TDS) experiments, the lock-in amplifier works with trans-impedance pre-amplifier to amplitude the terahertz pulse accepted from detector. This paper discusses the development of data acquisition system for the transmission THz-TDS. In this system, the cross-correlation software algorithm in SR830 lock-in amplifier from Stanford Research Systems, that is usually used in THz-TDS, has been replaced by parallel hardware algorithm of Field Programmable Gate Array (FPGA) chip with the parallel processing ability. This chip has a faster processing speed and higher accuracy than others. A 24 bit Delta-Sigma Analog Digital (AD) was used in place of the 16 bit successive approximation ADC of SR830. The new AD convertor can reduce the complexity of trans-impedance pre-amplifier circuit and replace the SR555 current amplifiers that designed to work with SRS lock-in amplifiers. Besides trans-impedance pre-amplifier circuit, all function circuits, such as low-pass digital filter, phase-locked loop, Direct Digital Synthesis (DDS) reference source and the core algorithms, are integrated in a FPGA chip, which make the new designed lock-in amplifier with a small volume reduce a dozen times SR830 size.